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FAN1654M Hoja de datos - Fairchild Semiconductor

Número de piezaDescripción (Función)Fabricante
FAN1654M 1.5A LDO, DDR Bus Termination Regulator Fairchild
Fairchild Semiconductor Fairchild
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FAN1654M Ficha de datos PDF : FAN1654M pdf   
FAN1654 image

Description
The FAN1654 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 1A continuous, 1.5A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = (VDDQ/2) ± 40mV.

Features
• Sinks and sources 1A continuous, 1.5A peak
• -40°C to +125°C Operating Range
• Load regulation: (VDDQ/2) ± 40mV
• 5mA VREF buffer tracks VTT
• On-chip thermal limiting
• Power-enhanced eTSSOP™-16 package
• Low Current Shutdown Mode
• Output Short Circuit Protection

Applications
• DDR terminators

 

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