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A29L004 Hoja de datos - AMIC Technology

Número de piezaDescripción (Función)Fabricante
A29L004 512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory AMICC
AMIC Technology AMICC
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A29L004 Ficha de datos PDF : A29L004 pdf   
A29L004UL-70 image

General Description
The A29L004 is a 4Mbit, 3.0 volt-only Flash memory organized as 524,288 bytes of 8 bits. The 8 bits of data appear on I/O0 - I/O7. The A29L004 is offered in 40-pin TSOP, 32-pin PLCC or (s)TSOP packages. This device is designed to be programmed in-system with the standard system 3.0 volt VCC supply. Additional 12.0 volt VPP is not required for in-system write or erase operations. However, the A29L004 can also be programmed in standard EPROM programmers.

Features
■ Single power supply operation
   - Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications
   - Regulated voltage range: 3.0 to 3.6 volt read and write operations for compatibility with high performance 3.3 volt microprocessors
■ Access times:
   - 70/90 (max.)
■ Current:
   - 4 mA typical active read current
   - 20 mA typical program/erase current
   - 200 nA typical CMOS standby
   - 200 nA Automatic Sleep Mode current
■ Flexible sector architecture
   - 16 Kbyte/ 8 KbyteX2/ 32 Kbyte/ 64 KbyteX7 sectors
   - Any combination of sectors can be erased
   - Supports full chip erase
   - Sector protection:
      A hardware method of protecting sectors to prevent any inadvertent program or erase operations within that sector. Temporary Sector Unprotect feature allows code changes in previously locked sectors
■ Unlock Bypass Program Command
   - Reduces overall programming time when issuing multiple program command sequence
■ Top or bottom boot block configurations available
■ Embedded Algorithms
   - Embedded Erase algorithm will automatically erase the entire chip or any combination of designated sectors and verify the erased sectors
   - Embedded Program algorithm automatically writes and verifies data at specified addresses
■ Typical 100,000 program/erase cycles per sector
■ 20-year data retention at 125°C
   - Reliable operation for the life of the system
■ Compatible with JEDEC-standards
   - Pinout and software compatible with single-power supply Flash memory standard
   - Superior inadvertent write protection
■ Data Polling and toggle bits
   - Provides a software method of detecting completion of program or erase operations
■ Ready / BUSY pin (RY / BY )
   - Provides a hardware method of detecting completion of program or erase operations (not available on 32-pin PLCC & (s)TSOP packages)
■ Erase Suspend/Erase Resume
   - Suspends a sector erase operation to read data from, or program data to, a non-erasing sector, then resumes the erase operation
■ Hardware reset pin (RESET )
   - Hardware method to reset the device to reading array data (not available on 32 pin PLCC & (s)TSOP packages)
■ Package options
   - 40-pin TSOP (forward type), 32-pin PLCC or (s)TSOP (forward type)

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