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DS90CF364A Hoja de datos - National ->Texas Instruments

Número de piezaDescripción (Función)Fabricante
DS90CF364A +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link —65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link—65 MHz National-Semiconductor
National ->Texas Instruments National-Semiconductor
DS90CF364A PDF Hoja de datos : DS90CF364A pdf   
DS90CF384A image

General Description
The DS90CF384A receiver converts the four LVDS data streams (Up to 1.8 Gbps throughput or 227 Megabytes/sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF364A that converts the three LVDS data streams (Up to 1.3 Gbps throughput or 170 Megabytes/sec bandwidth) back into parallel 21 bits of CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync and DE). Both Receivers' outputs are Falling edge strobe. A Rising edge or Falling edge strobe transmitter (DS90C383A/DS90C363A) will interoperate with a Falling edge strobe Receiver without any translation logic.

Features
20 to 65 MHz shift clock support
50% duty cycle on receiver output clock
Best–in–Class Set & Hold Times on RxOUTPUTs
Rx power consumption <142 mW (typ) @65MHz Grayscale
Rx Power-down mode <200μW (max)
ESD rating >7 kV (HBM), >700V (EIAJ)
Supports VGA, SVGA, XGA and Dual Pixel SXGA.
PLL requires no external components
Compatible with TIA/EIA-644 LVDS standard
Low profile 56-lead or 48-lead TSSOP package
DS90CF384A is also available in a 64 ball, 0.8mm fine
pitch ball grid array (FBGA) package

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