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74LVX02MTR Datasheet PDF - STMicroelectronics

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74LVX02MTR Datasheet PDF : 74LVX02MTR pdf     
74LVX02 image

DESCRIPTION
The 74LVX02 is a low voltage CMOS QUAD 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.
The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output.
Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED:
   tPD = 4.5ns (TYP.) at VCC = 3.3V
■ 5V TOLERANT INPUTS
■ INPUT VOLTAGE LEVEL:
   VIL=0.8V, VIH=2V at VCC=3V
■ LOW POWER DISSIPATION:
   ICC = 2 µA (MAX.) at TA=25°C
■ LOW NOISE:
   VOLP = 0.3V (TYP.) at VCC = 3.3V
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 4mA (MIN)
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE:
   VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY
■ POWER DOWN PROTECTION ON INPUTS

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