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CD74HCT73 Hoja de datos - Texas Instruments

Número de piezaDescripción (Función)Fabricante
CD74HCT73 Dual J-K Flip-Flop with Reset Negative-Edge Trigger Texas-Instruments
Texas Instruments Texas-Instruments
CD74HCT73 PDF Hoja de datos : CD74HCT73 pdf   
CD74HCT73 image

Description
The ’HC73 and CD74HCT73 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.
   
Features
• Hysteresis on Clock Inputs for Improved Noise
    Immunity and Increased Input Rise and Fall Times
• Asynchronous Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF,
    TA = 25°C
• Fanout (Over Temperature Range)
    - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
    Logic ICs
• HC Types
    - 2V to 6V Operation
    - High Noise Immunity: NIL = 30%, NIH = 30% of VCC
        at VCC = 5V
• HCT Types
    - 4.5V to 5.5V Operation
    - Direct LSTTL Input Logic Compatibility,
        VIL= 0.8V (Max), VIH = 2V (Min)
    - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
   

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