W83194BR-KT Ver la hoja de datos (PDF) - Winbond
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W83194BR-KT Datasheet PDF : 13 Pages
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W83194BR-KT
PRELIMINARY
6.0 MODE PIN -POWER MANAGEMENT INPUT CONTROL
MODE1, Pin7 (Latched Input)
1
0
PIN 41
RESET# (Open Drain)
PD# (Input)
7.0 FUNTION DESCRIPTION
7.1 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the default state at
true power up. "Command Code" byte and "Byte Count" byte must be sent following the
acknowledge of the Address Byte. Although the data (bits) in these two bytes are considered "don't
care", they must be sent and will be acknowledge. After that, the sequence described below
(Register 0, Register 1, Register 2, ....) will be valid and acknowledged.
Frequency table by software via I2C
SSEL4 SSEL3 SSEL2 SSEL1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
1
0
0
1
1
0
1
0
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
1
0
0
1
1
0
SSEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CPU (MHz)
166.00
160.00
155.00
150.00
145.00
140.00
136.00
130.00
127.00
124.00
120.00
118.00
116.00
115.00
-7-
PCI (MHz)
41.60
40.00
38.70
37.50
36.20
35.00
34.00
32.50
31.70
31.00
40.00
39.30
38.60
38.30
Publication Release Date: June 2000
Revision 0.43
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