74HC595 Ver la hoja de datos (PDF) - Philips Electronics
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74HC595
Philips Electronics
74HC595 Datasheet PDF : 28 Pages
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Philips Semiconductors
8-bit serial-in, serial or parallel-out shift
register with output latches; 3-state
Product specification
74HC595; 74HCT595
Family 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
SYMBOL
PARAMETER
TEST CONDITIONS
WAVEFORMS VCC (V)
MIN.
Tamb = 25 °C
tPHL/tPLH
propagation delay
SH_CP to Q7’
see Fig.7
4.5
−
propagation delay
ST_CP to Qn
see Fig.8
4.5
−
tPHL
propagation delay
see Fig.10
4.5
−
MR to Q7’
tPZH/tPZL
3-state output enable time see Fig.11
OE to Qn
4.5
−
tPHZ/tPLZ
3-state output disable time see Fig.11
OE to Qn
4.5
−
tW
shift clock pulse width
see Fig.7
4.5
16
HIGH or LOW
storage clock pulse width see Fig.8
HIGH or LOW
4.5
16
master reset pulse width see Fig.10
LOW
4.5
20
tsu
set-up time DS to SH_CP see Fig.9
4.5
16
set-up time
see Fig.8
4.5
16
SH_CP to ST_CP
th
hold time DS to SH_CP see Fig.9
4.5
+3
trem
removal time
MR to SH_CP
see Fig.10
4.5
+10
fmax
maximum clock
see Figs 7 and 8 4.5
30
pulse frequency
SH_CP or ST_CP
Tamb = −40 to +85 °C
tPHL/tPLH
propagation delay
SH_CP to Q7’
see Fig.7
propagation delay
ST_CP to Qn
see Fig.8
tPHL
propagation delay
see Fig.10
MR to Q7’
tPZH/tPZL
3-state output enable time see Fig.11
OE to Qn
tPHZ/tPLZ
3-state output disable time see Fig.11
OE to Qn
4.5
−
4.5
−
4.5
−
4.5
−
4.5
−
TYP.
25
24
23
21
18
6
5
8
5
8
−2
−7
52
−
−
−
−
−
MAX.
42
40
40
35
30
−
−
−
−
−
−
−
−
53
50
50
44
38
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
2003 Jun 25
17
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