AD1986 Ver la hoja de datos (PDF) - Analog Devices
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AD1986 Datasheet PDF : 52 Pages
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AD1986
AC ’97 TIMING PARAMETERS
Guaranteed over operating temperature range. Refer to the AC ’97 specifications (Revision 2.3, Release 1.0) for further information. The
specification can be downloaded from http://developer.intel.com/ial.scalableplatforms/audio.
Table 14.
Symbol
tRST_LOW
tRST2CLK
RESET
tRST_LOW
tRST2CLK
BIT_CLK
Figure 2. Cold Reset Timing (CODEC is Supplying the BIT_CLK Signal)
Parameter
Recommended During Active (Low) RESET Signal
RESET Inactive (High) to BIT_CLK Active
Min
Typ Max
Unit
1.0
µS
162.8
400,000 nS
Table 15.
Symbol
tSYNC_HIGH
tSYNC2CLK
SYNC
BIT_CLK
tSYNC_HIGH
tSYNC2CLK
Figure 3. Warm Reset Timing
Parameter
Sync Active (High) Pulse Width
Sync Inactive to BITCLK Startup Delay
Min
Typ
1.3
162.8
Max
Unit
µS
nS
Table 16.
Symbol
tSETUP2RST
tOFF
RESET
SDATA_OUT
SYNC
BIT_CLK, EAPD,
SPDIF_OUT,
SDATA_IN,
DIGITAL I/O
tSETUP2RST
tOFF
Figure 4. ATE Test Mode
Parameter
Setup to RESET Inactive (SYNC, SDATA_OUT)
Rising Edge of RESET to Hi-Z Delay
Hi-Z
Min
Typ
Max
Unit
15
nS
25
nS
Rev. 0 | Page 9 of 52
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