SWITCHING CHARACTERISTICS
(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF)
Parameter
Symbol
Min
Typ
RST Pin Low Pulse Width
200
-
PLL Clock Recovery Sample Rate Range
30
-
RMCK Output Jitter
(Note 5)
-
200
RMCK Output Duty-Cycle
(Note 6)
(Note 7)
45
50
50
55
RMCK/OMCK Maximum Frequency
-
-
Notes:
5. Typical RMS cycle-to-cycle jitter.
6. Duty cycle when clock is recovered from biphase encoded input.
7. Duty cycle when OMCK is switched over for output on RMCK.
CS8416
Max
Units
-
μS
200
kHz
-
ps RMS
55
%
65
%
50
MHz
8
DS578F3