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SL74HC4051D

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC4051

Figure 2. Maximum Off Channel Leakage

Current, Any One Channel, Test Set-UP

Figure 3. Maximum Off Channel Leakage Current,

Common Channel, Test Set-UP

Figure 4. Maximum On Channel Leakage

Current, Channel to Channel, Test Set-UP

* Includes all probe and jig capacitance.

Figure 5. Maximum On Channel Bandwidth,

Test Set-UP

* Includes all probe and jig capacitance.

Figure 6. Off Channel Feedthrough Isolation,

Test Set-UP

* Includes all probe and jig capacitance.

Figure 7.Feedthrough Noise, Channel Select to Common

Out, Test Set-UP

SLS

System Logic

Semiconductor

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