Clock and data timings
CLOCK
75%
25%
tr
DATA
LATCH
t cr
t WHC
tf
t WLC
75%
25%
tr
t SD
tf
t HD
tr
tSL
tWHC
tf
75%
25%
Timing definition of digital block
Symbol
t cr
t WHC
t WLC
tr
tf
t SD
t HD
tSL
tWHL
Parameter
Clock cycle time
Clock pulse width("H"level)
Clock pulse width("L"level)
Rising time of clock,data and latch
Falling time of clock,data and latch
Data setup time
Data hold time
Latch setup time
Latch pulse width
Limits
Min typ Max
4
1.6
1.6
0.4
0.4
0.8
0.8
1
1.6
Unit
µsec
MITSUBISHI
ELECTRIC
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