XRT84L38
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
APPLICATIONS
• High-Density T1/E1/J1 interfaces for Multiplexers, Switches, LAN Routers and Digital Modems
• SONET/SDH terminal or Add/Drop multiplexers (ADMs)
• T1/E1/J1 add/drop multiplexers (MUX)
• Channel Service Units (CSUs): T1/E1/J1 and Fractional T1/E1/J1
• Digital Access Cross-connect System (DACs)
• Digital Cross-connect Systems (DCS)
• Frame Relay Switches and Access Devices (FRADS)
• ISDN Primary Rate Interfaces (PRA)
• PBXs and PCM channel bank
• T3 channelized access concentrators and M13 MUX
• Wireless base stations
• ATM equipment with integrated DS1 interfaces
• Multichannel DS1 Test Equipment
• T1/E1/J1 Performance Monitoring
• Voice over packet gateways
• Routers
FEATURES
• Eight independent, full duplex DS1 Tx and Rx Framers
• Two 512-bit (two-frame) elastic store, PCM frame slip buffers (FIFO) on TX and Rx provide up to 8.192 MHz
asynchronous back plane connections with jitter and wander attenuation
• Supports input PCM and signaling data at 1.544, 2.048, 4.096 and 8.192 Mbits. Also supports 4-channel
multiplexed 12.352/16.384 (HMVIP/H.100) Mbit/s on the back plane bus
• Programmable output clocks for Fractional T1/E1/J1
• Supports Channel Associated Signaling (CAS)
• Supports Common Channel Signalling (CCS)
• Supports ISDN Primary Rate Interface (ISDN PRI) signaling
• Extracts and inserts robbed bit signaling (RBS)
• 3 independent HDLC Controllers for Receive and Transmit on a per channel basis
• Each HDLC controller contains two 96-BYTE buffers
• Timeslot assignable HDLC
• V5.1 and V5.2 Interface
• 8-bit Intel/Motorola μP and MIPS Power PC interfaces for configuration, control and status monitoring
• Parallel search algorithm for fast frame synchronization
• Wide choice of T1 framing structures: D4, ESF, SLC®96, TIDM and N-Frame (non-framing)
• Direct access to D and E channels for fast transmission of data link information
• PRBS and QRSS generation and detection
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