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ZR36016 Ver la hoja de datos (PDF) - Zoran Corporation

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ZR36016 Datasheet PDF : 36 Pages
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Integrated Color Space / Raster-To-Block Converter
Hardware Interfaces
Image Input/Outputs
SYSCLK and PXCLK
The ZR36016 requires two system clocks: PXCLK, at the data
rate of the pixel buses, and SYSCLK, at the data rate of the
ZR36050 interface. The frequency ratio of PXCLK to SYSCLK
depends on the compressed image format and other setup
register bits, as shown in Table 8.
For some of the configurations shown in the table, the PXCLK to
SYSCLK frequency ratio is 1. When this happens, the output
pixel bus, PXOUT, is actually clocked with SYSCLK. PXCLK, at
the same rate as SYSCLK, is still required, however, to clock the
input pixel bus PXIN, and for reset and other operations.
When the HORZ setup register bit is set, for horizontal decima-
tion or interpolation, there are in most cases two options for the
PXCLK to SYSCLK frequency ratio as selected by the CKRT bit
of Setup Register 1.
Table 8: Ratio of PXCLK to SYSCLK
HORZ
ZR36050 Image
Format
Bit
Decimation/
Interpolation [1]
Y
CB/CR
VERT
Compression Format and
Resolution
4:2:2
1
x
x
1
2:1:1 (Quarter Screen)
4:2:2
1
x
x
0
2:1:1 (Horizontal Half-Screen)
4:2:2
0
1
4:2:2 (Vertical Half-Screen)
4:2:2
0
0
4:2:2 (Full-Screen)
4:1:1 (H4V1)
1
x
1
2:1:1 (Quarter Screen)
4:1:1 (H4V1)
1
x
0
2:1:1 (Horizontal Half-Screen)
4:1:1 (H4V1)
0
1
4:1:1 (Vertical Half-Screen)
4:1:1 (H4V1)
0
0
4:1:1 (Full-Screen)
4:1:1 (H2V2)
4:1:1 (Full-Screen)
4:4:4
1
Each Component
1
2:2:2 (Quarter Screen)
4:4:4
1
Each Component
0
2:2:2 (Horizontal Half-Screen)
4:4:4
0
1
4:4:4 (Vertical Half-Screen)
4:4:4
0
0
4:4:4 (Full-Screen)
4:4:4:4
1
Each Component
1
2:2:2:2 (Quarter Screen)
4:4:4:4
1
Each Component
0
2:2:2:2 (Horizontal Half-Screen)
4:4:4:4
0
1
4:4:4:4 (Vertical Half-Screen)
4:4:4:4
0
0
4:4:4:4 (Full-Screen)
4:0:0 (1:0:0)
1
x
1
2:0:0 (Quarter Screen)
4:0:0 (1:0:0)
1
x
0
2:0:0 (Horizontal Half-Screen)
4:0:0 (1:0:0)
0
1
4:0:0 (Vertical Half-Screen)
4:0:0 (1:0:0)
0
0
4:0:0 (Full-Screen)
1. x = Decimation/Interpolation is performed on these components; – = Not performed or not applicable.
PXCLK to SYSCLK
Frequency Ratio
CKRT
0
1
1/2
1
1/2
1
1/2
1/2
1/2
1
1/2
1
1/2
1/2
1/2
1/4
1/2
1/4
1/2
1/4
1/4
1/2
1
1/2
1
1/2
1/2
1
1
1
1
10

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