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74HC/HCT533

Octal D-type transparent latch; 3-state; inverting

Philips Electronics 

Philips Semiconductors

Octal D-type transparent latch; 3-state;

inverting

AC WAVEFORMS

Product specification

74HC/HCT533

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.7 Waveforms showing the data input (Dn) to

output (Qn) propagation delays and the

output transition times.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.8

Waveforms showing the latch enable input

(LE) pulse width, the latch enable input to

output (Qn) propagation delays and the

output transition times.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.9 Waveforms showing the 3-state enable and

disable times.

The shaded areas indicate when the input is permitted to

change for predictable output performance.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.10 Waveforms showing the data set-up and

hold times for Dn input to LE input.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

December 1990

7

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