8255A-5 Ver la hoja de datos (PDF) - Intel

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8255A-5

CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

Intel 

82C55A

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Figure 3 82C55A Block Diagram Showing Data Bus Buffer and Read Write Control Logic Functions

NOTE

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Port pins loaded with more than 20 pF capacitance may not have their logic level guaranteed following a hardware reset

Figure 4 Port A B C Bus-hold Configuration

4

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