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74LV595
(Rev.:2016)

8-bit serial-in/serial-out or parallel-out shift register; 3-state

NXP Semiconductors. 

Nexperia

74LV595

8-bit serial-in/serial-out or parallel-out shift register; 3-state

6. Pinning information

6.1 Pinning

/9

4 

4 

4 

4 

4 

4 

4 

*1' 

 9&&

 4

 '6

 2(

 67&3

 6+&3

 05

 46

DDM

Fig 6. Pin configuration SO16

/9

4 

4 

4 

4 

4 

4 

4 

*1' 

 9&&

 4

 '6

 2(

 67&3

 6+&3

 05

 46

POD

Fig 7. Pin configuration SSOP16, TSSOP16

6.2 Pin description

Table 2. Pin description

Symbol

Q0 to Q7

GND

Q7S

MR

SHCP

STCP

OE

DS

VCC

Pin

15, 1, 2, 3, 4, 5, 6, 7

8

9

10

11

12

13

14

16

Description

parallel data output

ground (0 V)

serial data output

master reset (active LOW)

shift register clock input

storage register clock input

output enable input (active LOW)

serial data input

supply voltage

74LV595

Product data sheet

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Rev. 4 — 18 March 2016

© Nexperia B.V. 2017. All rights reserved

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