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HD74HC109

Dual J-KFlip-Flops (with Preset and Clear)

Hitachi -> Renesas Electronics 

HD74HC109

Dual J-K Flip-Flops (with Preset and Clear)

Description

Each flip-flop has independent J, K, preset, clear and clock inputs and Q and Q outputs. This device is

edge sensitive to the clock input and changes state on the positive going transition of the clock pulse. Clear

and preset are independent of the clock and accomplished by a low logic level on the corresponding input.

Features

• High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)

• High Output Current: Fanout of 10 LSTTL Loads

• Wide Operating Voltage: VCC = 2 to 6 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)

Function Table

Inputs

Output

Preset

Clear

Clock

J

K

Q

Q

L

H

X

X

X

H

L

H

L

X

X

X

L

H

L

L

X

X

X

H*1

H*1

H

H

L

L

L

H

H

H

H

L

Toggle

H

H

H

H

L

H

Q0

Q0

H

H

H

L

H

Note:

H

L

X

X

Q0

Q0

1. Q and Q will remain high as long as preset and clear input are low, but Q and Q are

unpredictable if preset and clear input go high simultaneously.

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