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SL74HC374

Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC374

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)

Symbol

Parameter

Test Conditions

VIH

Minimum High-Level VOUT=0.1 V or VCC-0.1 V

Input Voltage

IOUT≤ 20 µA

VIL

Maximum Low -Level VOUT=0.1 V or VCC-0.1 V

Input Voltage

IOUT ≤ 20 µA

VOH

Minimum High-Level VIN=VIH or VIL

Output Voltage

IOUT ≤ 20 µA

VIN=VIH or VIL

IOUT ≤ 6.0 mA

IOUT ≤ 7.8 mA

VOL

Maximum Low-Level VIN= VIL or VIH

Output Voltage

IOUT ≤ 20 µA

VIN= VIL or VIH

IOUT ≤ 6.0 mA

IOUT ≤7.8 mA

IIN

Maximum Input

Leakage Current

VIN=VCC or GND

IOZ

Maximum Three State Output in High-Impedance

Leakage Current

State

VIN =VIH or VIL

VOUT= VCC or GND

ICC

Maximum Quiescent VIN=VCC or GND

Supply Current

IOUT=0µA

(per Package)

VCC

Guaranteed Limit

V 25 °C ≤85 ≤125 Unit

to

°C °C

-55°C

2.0 1.5 1.5 1.5 V

4.5 3.15 3.15 3.15

6.0 4.2 4.2 4.2

2.0 0.5 0.5 0.5 V

4.5 1.35 1.35 1.35

6.0 1.8 1.8 1.8

2.0 1.9 1.9 1.9 V

4.5 4.4 4.4 4.4

6.0 5.9 5.9 5.9

4.5 3.98 3.84 3.7

6.0 5.48 5.34 5.2

2.0 0.1 0.1 0.1 V

4.5 0.1 0.1 0.1

6.0 0.1 0.1 0.1

4.5 0.26 0.33 0.4

6.0 0.26 0.33 0.4

6.0 ±0.1 ±1.0 ±1.0 µA

6.0 ±0.5 ±5.0 ±10 µA

6.0 4.0

40 160 µA

SLS

System Logic

Semiconductor

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