HT9480
The PC value is incremented by one after a
program memory word is accessed in order to
fetch an instruction code. The PC then points to
a memory word with the next instruction code.
The PC loads the address corresponding to each
instruction and then manipulates program
transfer while executing a jump instruction,
conditional skip execution, loading a PCL, a
register, a subroutine call, an initial reset, an
internal interrupt, an external interrupt, or re-
turning from a subroutine.
The conditional skip is activated by instruc-
tions. Once the condition is satisfied, the next
instruction, fetched during the current instruc-
tion execution, is discarded, and a dummy cycle
is replaced to get a proper instruction. Other-
wise it proceeds with the following instruction.
The low byte of the PC (PCL) is a readable and
writable register (06H). Moving data into the
PCL performs a short jump. The destination is
within 256 locations.
If a control transfer takes place, an additional
dummy cycle is required.
Program memory – ROM
The program memory (ROM) is used to store
the program instructions that are to be exe-
cuted. It consists of data, table(s), and interrupt
entries, and is organized into 8192×16 bits,
which are addressed by the PC and table pointer.
Certain locations in the ROM are reserved for
specific usage:
• Location 0000H
Location 0000H is reserved for program in-
itialization. The program always begins exe-
cution at this location each time the chip is
reset.
• Location 0004H
Location 0004H is reserved for the data ready
interrupt and battery fail interrupt service
programs. If an interrupt results from a pager
decoder interrupt request or from a battery
fail interrupt request, and the interrupt is
enabled, and the stack is not full, the program
begins execution at location 0004H. The oc-
currence of a data ready interrupt or a battery
Program memory
fail interrupt is detected by checking the bat-
tery fail interrupt bit (1EH-bit 4, BF flag) and
the data ready interrupt bit (1EH-bit 7, DR
flag). The interrupt should be carefully proc-
essed if both interrupt bits are active.
• Location 0008H
Location 0008H is reserved for the program-
mable timer interrupt service program. If an
interrupt results from a programmable timer
interrupt request (its source is from 256Hz
divided by N, where the value of N ranges
from 1 to 256.), and the interrupt is enabled,
and the stack is not full, the program begins
execution at location 0008H.
• Location 000CH
Location 000CH is reserved for the timer/event
counter interrupt service program. If a timer
interrupt results from a timer/event counter
overflow, and the interrupt is enabled, and the
stack is not full, the program begins execution
at location 000CH.
• Look-up tables XX00H~XXFFH
The ROM is composed of 32 groups (each
group contains 256 continuous words) which
can be used as look–up tables. The instruc-
tions “TABRDC [m]” (the current table) and
“TABRDL [m]” (the last table) transfer the
contents of the low-order byte to the specified
data memory, and the contents of the high-or-
der byte to TBLH (Table High-order Byte Reg-
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23th Feb ’98