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PI6CV857A

PLL Clock Driver for 2.5V DDR-SDRAM Memory

Pericom Semiconductor 

PI6CV857

112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788P99L0011L223344C5566l77o8899c00k112233D4455r66i77v8899e00r1122F1122o3344r5566277.88599V001122D334455D6677R8899-00S1122D3344R5566A778899M001122M112233e4455m6677o8899r00y1122

Yx, FBOUT

Yx, FBOUT

Yx, FBOUT

Yx, FBOUT

tcycle n

1

fO

t jit(per) = t cycle n

1

fO

Figure 6. Period Jitter

Yx, FBOUT

Yx, FBOUT

thalf period n

1

fO

t n+1

half period

t jit(hper) = t half period n

1

2*fO

Figure 7. Half-Period Jitter

80%

20%

Clock Inputs

and Outputs

t sl(i), t sl(o)

t sl(i), t sl(o)

80%

V ID

20%

Figure 8. Input and Output Slew Rates

8

PS8464B 11/10/00

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