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TDA9962

12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras

Philips Electronics 

Philips Semiconductors

12-bit, 3.0 V, 20 Msps analog-to-digital

interface for CCD cameras

Objective specification

TDA9962

SYMBOL

PARAMETER

CONDITIONS

Digital outputs (fpix = 20 MHz; CL = 10 pF); see Figs 3 and 4

VOH

HIGH-level output voltage IOH = −1 mA

VOL

LOW-level output voltage IOL = 1 mA

IOZ

output current in 3-state 0.5 V < Vo < VCCO

mode

th(o)

output hold time

td(o)

output delay time

CL = 10 pF; VCCO = 3.0 V

CL = 10 pF; VCCO = 2.7 V

CL = 10 pF; VCCO = 2.2 V

CL

output load capacitance

Serial interface

fSCLK(max)

maximum frequency of

serial clock interface

MIN.

TYP.

VCCO − 0.5 −

0

−

−20

−

5

−

−

16

−

18

−

tbf

−

−

10

−

MAX. UNIT

VCCO V

0.5 V

+20 µA

−

ns

tbf

ns

tbf

ns

tbf

ns

20

pF

−

MHz

2000 May 01

10

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