AD9042 Ver la hoja de datos (PDF) - Analog Devices
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AD9042 Datasheet PDF : 24 Pages
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AD9042–SPECIFICATIONS
DC SPECIFICATIONS (AVCC = DVCC = +5 V; VREF tied to VOFFSET through 50 Ω; TMIN = –40؇C, TMAX = +85؇C)1
Parameter
Test
AD9042AST
Temp Level Min Typ Max
Test
AD9042AD
Level Min Typ Max
RESOLUTION
12
12
DC ACCURACY
No Missing Codes
Offset Error
Offset Tempco
Gain Error
Gain Tempco
Full
VI
Full
VI
Full
V
Full
VI
Full
V
Guaranteed
VI
–10 ± 3 +10
VI
25
V
–6.5 0
+6.5 VI
–50
V
Guaranteed
–10 ± 3 +10
25
–6.5 0
+6.5
–50
REFERENCE OUT (VREF)2
ANALOG INPUT (AIN)
Input Voltage Range
Input Resistance
Input Capacitance
ENCODE INPUT3
Logic Compatibility4
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current (VINH = 5 V)
Logic “0” Current (VINL = 0 V)
Input Capacitance
+25°C V
Full
IV
+25°C V
Full
VI
Full
VI
Full
VI
Full
VI
+25°C V
2.4
V
VREF ± 0.500
200 250 300
IV
5.5
V
TTL/CMOS
2.0
5.0
VI
0
0.8
VI
450 625 800
VI
–400 –300 –200 VI
2
V
2.4
VREF ± 0.500
200 250 300
7
TTL/CMOS
2.0
5.0
0
0.8
450 625 800
–400 –300 –200
2.5
DIGITAL OUTPUTS
Logic Compatibility
Logic “1” Voltage (IOH = 10 µA)
Logic “0” Voltage (IOL = 10 µA)
Output Coding
+25°C I
Full
IV
+25°C I
Full
IV
CMOS
3.5 4.2
I
3.5
IV
0.75 0.80 I
0.85 IV
Twos Complement
CMOS
3.5 4.2
3.5
0.75 0.80
0.85
Twos Complement
POWER SUPPLY
AVCC Supply Voltage
I (AVCC) Current
DVCC Supply Voltage
I (DVCC) Current
ICC (Total) Supply Current
Power Dissipation
Power Supply Rejection
(PSRR)
Full
VI
Full
V
Full
VI
Full
V
Full
VI
Full
VI
+25°C I
Full
V
5.0
VI
109
V
5.0
VI
10
V
119 147
VI
595 735
VI
–20 ± 1 +20
I
±5
V
5.0
109
5.0
10
119 147
595 735
–20 ± 1 +20
±5
NOTES
1C1 (Pin 10 on AD9042AST only) tied to GND through 0.01 µF capacitor.
2VREF is normally tied to VOFFSET through 50 Ω. If VREF is used to provide dc offset to other circuits, it should first be buffered.
3ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 µF capacitor.
4ENCODE may also be driven differentially in conjunction with ENCODE; see “Encoding the AD9042” for details.
Specifications subject to change without notice.
SWITCHING SPECIFICATIONS (AVCC = DVCC = +5 V; ENCODE & ENCODE = 41 MSPS;
VREF tied to VOFFSET through 50 Ω; TMIN = –40؇C, TMAX = +85؇C)1
Parameter (Conditions)
Test
AD9042AST
Temp Level Min Typ Max
Test
AD9042AD
Level Min Typ Max
Maximum Conversion Rate
Minimum Conversion Rate
Aperture Delay (tA)
Aperture Uncertainty (Jitter)
ENCODE Pulse Width High
ENCODE Pulse Width Low
Output Delay (tOD)
Full
VI
41
VI
41
Full
IV
5
IV
5
+25°C V
–250
V
–250
+25°C V
0.7
V
0.7
+25°C IV
10
IV
10
+25°C IV
10
IV
10
Full
IV
5
9
14
IV
5
9
14
NOTE
1C1 (Pin 10 on AD9042AST only) tied to GND through 0.01 µF capacitor.
–2–
Units
Bits
mV
ppm/°C
% FS
ppm/°C
V
V
Ω
pF
V
V
µA
µA
pF
V
V
V
V
V
mA
V
mA
mA
mW
mV/V
mV/V
Units
MSPS
MSPS
ps
ps rms
ns
ns
ns
REV. A
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