MC10153FN Ver la hoja de datos (PDF) - ON Semiconductor
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MC10153FN Datasheet PDF : 8 Pages
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MC10153
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
–30°C
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
+25°C –0.810 –1.850 –1.105
–1.475
–5.2
+85°C –0.700 –1.825 –1.035
–1.440
–5.2
Characteristic
Power Supply Drain Current
Input Current
Symbol
IE
IinH
Pin
Under
Test
8
3
4
5
13
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
VIHmax
VILmin
13
VIHAmin
VILAmax
VEE
8
3
8
4
8
5
8
13
8
(VCC)
Gnd
1, 16
1, 16
1, 16
1, 16
1, 16
Output Voltage
IinL
3
Logic 1 VOH
2
2
3
3
4
3
13
8
1, 16
8
1, 16
8
1, 16
Output Voltage
Logic 0 VOL
2
2
2
3,13
3,5
13
3,4
8
1, 16
8
1, 16
8
1, 16
Threshold Voltage
Logic 1 VOHA
2
3
4
5
8
1, 16
2
4
3
8
1, 16
2
3
4
8
1, 16
2[
3
8
1, 16
2]
8
1, 16
2]
8
1, 16
2
3
4
8
1, 16
2
3
13
8
1, 16
Threshold Voltage
Logic 0 VOLA
2
3
4
5
8
1, 16
2
4
3
8
1, 16
2
4
8
1, 16
2[
8
1, 16
2]
3
8
1, 16
2]
3
13
8
1, 16
Switching Times
(50Ω Load)
+1.11 V
Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay
t3+2+
2
t4–2+
2
3*
t5–2+
2
tsetup
3
thold
3
Rise Time
(20 to 80%)
t2+
2
Fall Time
(20 to 80%)
t2–
2
3
2
8
1, 16
4
2
8
1, 16
5
2
8
1, 16
3
2
8
1, 16
3
2
8
1, 16
3
2
8
1, 16
3
2
8
1, 16
[ Output level to be measured after a clock pulse has been applied to the clock input (Pin 4)
VIHmax
VILmin
] Data input at proper high/low level while clock pulse is high so that device latches ar proper high/low level for test. Levels are measured after
device has latched.
* Latch set to zero state before test.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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