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MC144112

Quad Six-Bit Digital-to-Analog Converter

Motorola => Freescale 

MAXIMUM RATINGS* (Voltages referenced to VSS)

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Parameter

Symbol

Value

Unit

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ DC Supply Voltage

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Input Voltage, All Inputs

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ DC Input Current, per Pin

VDD

Vin

I

– 0.5 to + 5.5

V

– 0.5 to VDD + 0.5

V

± 10

mA

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Power Dissipation (Per Output)

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ TA = 70°C

TA = 85°C

POH

mW

50

20

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Power Dissipation (Per Package)

PD

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ TA = 70°C

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ TA = 85°C

mW

150

50

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Storage Temperature Range

Tstg

– 65 to + 150

°C

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ * Maximum Ratings are those values beyond which damage to the device may occur.

This device contains protection circuitry to

guard against damage due to high static

voltages or electric fields; however, it is ad-

vised that precautions be taken to avoid

application of voltage higher than maximum

rated voltages to this high–impedance circuit.

For proper operation it is recommended that

Vin and Vout be constrained to the range VSS ≤

(Vin or Vout) ≤VDD.

Unused inputs must always be tied to an

appropriate logic voltage level (e.g., either VSS

or VDD).

ELECTRICAL CHARACTERISTICS (Voltages referenced to VSS, VDD = 2.7 to 5.5 V, TA = – 40 to 85°C unless otherwise indicated)

Symbol

Parameter

Test Conditions

VDD

Min

Max Unit

VIH High–Level Input Voltage (Din, ENB, CLK)

2.7

2.03

—

V

4.5

3.15

—

5.5

3.85

—

VIL Low–Level Input Voltage (Din, ENB, CLK)

2.7

—

0.67

V

4.5

—

1.35

5.5

—

1.65

IOH High–Level Output Current (Dout)

Vout = VDD – 0.5 V

2.7

0.3

4.5

1.1

—

mA

—

IOL Low–Level Output Current (Dout)

Vout = 0.5 V

2.7

1.0

4.5

1.8

—

mA

—

ISS Quiescent Supply Current (per Package) Iout = 0 µA, All DAC Outputs = Zero

2.7

—

1.25 mA

4.5

—

2.10

5.5

—

2.50

Iin

Vnonl

Vstep

Voffset

Input Leakage Current (Din, ENB, CLK)

Integral Nonlinearity (Rn Out)

Differential Nonlinearity (Rn Out)

Offset from VSS

Iout = 0 µA, All DAC Outputs = Full Scale

Vin = VDD or 0 V

See Figure 1

See Figure 2

Din = $00, See Figure 1

5.5

—

30

µA

5.5

—

1

µA

—

– 1 1/4

1/4

LSB

—

– 3/4

3/4

LSB

—

1/4

1 3/4 LSB

SWITCHING CHARACTERISTICS

(VDD = 2.7 to 5.5 V, Voltages referenced to VSS, TA = – 40 to 85°C, CL = 50 pF, Input tr = tf = 20 ns unless otherwise indicated)

Symbol

Parameter

Min

Max

twH

Positive Pulse Width, CLK (Figures 3 and 4)

166

—

twL

Negative Pulse Width, CLK (Figures 3 and 4)

166

—

tsu

Setup Time, ENB to CLK (Figures 3 and 4)

135

—

tsu

Setup Time, Din to CLK (Figures 3 and 4)

55

—

th

Hold Time, CLK to ENB (Figures 3 and 4)

135

—

th

Hold Time, CLK to Din (Figures 3 and 4)

55

—

tr, tf

Input Rise and Fall Times, CLK

—

100

Cin

Input Capacitance

—

10

fclk

Serial Data Clock Frequency (Refer to twH and twL Above) (Figures 3 and 4)

dc

3

Unit

ns

ns

ns

ns

ns

ns

µs

pF

MHz

MC144112

2

MOTOROLA

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