SM5013 series
Switching Characteristics
CF5013KD (Duty level CMOS )
VDD = 4.5 to 5.5V, VSS = 0V, Ta = − 20 to 80 °C, unless otherwise noted.
Parameter
Symbol
Condition
Output rise time
Output fall time
Output duty cycle1
Output disable delay time
Output enable delay time
1. Determined by the lot monitor.
tr
tf
DUTY
tPLZ
tPZL
Test circuit 5, load circuit 1, CL = 15pF, 0.1VDD → 0.9VDD
Test circuit 5, load circuit 1, CL = 15pF, 0.9VDD → 0.1VDD
Test circuit 5, Ta = 25°C, VDD = 5.0V
load circuit 1, CL = 15pF, f = 70MHz
Test circuit 5, Ta = 25°C, VDD = 5.0V, load circuit 1, CL = 15pF
Limit
unit
min typ max
−
3.5
7
ns
−
3.5
7
ns
45
−
55
%
−
−
100
ns
−
−
100
ns
CF5013LD (Duty level TTL )
VDD = 4.5 to 5.5V, VSS = 0V, Ta = − 20 to 80 °C, unless otherwise noted.
Parameter
Symbol
Condition
Output rise time
Output fall time
Output duty cycle1
Output disable delay time
Output enable delay time
1. Determined by the lot monitor.
tr
tf
DUTY
tPLZ
tPZL
Test circuit 5, load circuit 2, CL = 15pF, 0.4V → 2.4V
Test circuit 5, load circuit 2, CL = 15pF, 2.4V → 0.4V
Test circuit 5, Ta = 25°C, VDD = 5.0V
load circuit 2, CL = 15pF, f = 70MHz
Test circuit 5, Ta = 25°C, VDD = 5.0V, load circuit 2, CL = 15pF
Limit
unit
min typ max
−
2.5
7
ns
−
2.5
7
ns
45
−
55
%
−
−
100
ns
−
−
100
ns
FUNCTIONAL DESCRIPTION
Stand − by Function
When INH pin is Low-level, Q pin will be high-impedance.
INH
High(open)
Low
Q
Output
Hi - Z
NIPPON PRECISION CIRCUITS—6