HS-3374RH Ver la hoja de datos (PDF) - Intersil
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HS-3374RH Datasheet PDF : 3 Pages
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HS-3374RH
Functional Block Diagram
1 OF 8 IDENTICAL CIRCUITS
VDD
VCC
VDD
VCC
DISABLE
13
LEVEL
SHIFTER
D
2 (3, 4, 5, 6, 7, 8, 9)
A1 CMOS
INPUT (OUTPUT)
VDD
B1 TTL
OUTPUT
(INPUT)
VDD
D
GND
21 (20, 19,
LEVEL
SHIFTER
18, 17, 16,
15, 14)
ENABLE
LEVEL
E
SHIFTER
10
E
GND
GND
GND
NOTES:
2. Enable and disable are TTL type inputs
3. D and E outputs are common to all 8 channels
INPUT (OUTPUT)
DATA
TERMINAL
NUMBER
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
OUTPUT (INPUT)
DATA
TERMINAL
NUMBER
B0
21
B1
20
B2
19
B3
18
B4
17
B5
16
B6
15
B7
14
TRUTH TABLE
ENABLE DISABLE
FUNCTION
X
0
Convert CMOS Level to TTL Level
1
1
Convert TTL Level to CMOS Level
0
1
High Impedance (Z)
0 = Low Level 1 = High Level X = Don’t Care
Z = High Impedance on Both CMOS and TTL sides.
NOTE: An important caveat that is applicable to CMOS devices in
general is that unused inputs should never be left floating. This rule
applies to inputs connected to a three-state bus. The need for
external pull-up resistors during three-state bus conditions is
eliminated by the presence of regenerative latches on the following
HS-3374RH pins: A0 - 7.
The functional block diagram depicts one of these pins with the
regenerative latch. When the CMOS driver assumes the high
impedance state, the latch holds the bus in whatever logic state
(high or low) it was before the three-state condition. A transient
drive current of ±1.5mA at VDD/2 ±0.5V for 10ns is required to
switch the latch. Thus, CMOS device inputs connected to the bus
are not allowed to float during three-state conditions.
WARNING: Do not activate the Disable input by hardwiring to any
TTL input pins. This is an incorrect mode of operation.
2
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