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MITSUBISHI MICROCOMPUTERS
7641 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
RTS (Request-to-Send) Function
As a receiver, the UART can be configured to generate the Re-
quest-to-Send (RTSx) handshaking signal. This is enabled by
setting the RTS Function Enable Bit (bit 6 of UxCON) to “1”.
When reception is enabled, that is the Receive Enable Bit is “1”,
the RTSx pin goes “L” to inform a transmitter that reception is pos-
sible. The RTSx pin goes “H” at reception starting and does “L” at
receiving of the last bit.
The delay time from the reception of the last stop bit to the asser-
tion of RTSx is selectable using the RTS Assertion Delay Count
Select Bits.
When the Receive Enable Bit is set to “0” or the Receive initializa-
tion bit is set to “1”, the RTSx pin goes “H”. Even when the
Receive Enable Bit is set to “1”, the RTSx pin goes “H” if detecting
an invalid start bit.
Figure 29 shows the UARTx receive timing.
Transfer clock
Tranmit enable bit
Transmit buffer
empty flag
UTXD output (P84/UTXD1,
P80/UTXD2/SRDY)
Transmit complete flag
Data set into UARTx transmit buffer register 1
Data transferring from UARTx transmit
buffer register 1 to Transmit shift register 1
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1
This timing applies to the conditions:
•Character length = 8 bits
•Parity enabled
•1 stop bit
Fig. 28 UARTx transmit timing (CTS function disbled)
BRGx (x = 1, 2)
count source
Receive enable bit
URXD (P85/URXD1,
ST
P81/URXD2/SCLK)
D0
D1
D7
SP
Transfer clock generated at falling edge
of start bit and receive started
Receive data latched
Transfer clock
Receive buffer
empty flag
Data transferring from UARTx receive register
1 to Receive buffer register 1 (Note)
RTSx pin (P87/RTS1,
P83/RTS2/STXD)
Note: When no RTS assertion delay, the RTSx pin goes “L”.
The RTS assertion delay counts are selected by bits 4 to 7 of UARTx RTS control register.
This timing applies to the conditions:
•Character length = 8 bits
•Parity enabled
•1 stop bit
Fig. 29 UARTx transmit timing (RTS function enabled)
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