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PM7324 Ver la hoja de datos (PDF) - PMC-Sierra

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Lista de partido
PM7324 Datasheet PDF : 473 Pages
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S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
PM7324 S/UNI-ATLAS
S/UNI-ATM LAYER SOLUTION
PUBLIC REVISION HISTORY
Issue
No.
1
2
Issue Date
Sep., 1997
Nov., 1997
3
Feb., 1998
4
Oct., 1998
5
Jan., 1999
6
Sep., 1999
7
Jan., 2000
Details of Change
Initial release
Revised F4toF5 AIS processing and numerous other
clarifications and expanded descriptions.
Updated the Ingress and Egress VC Tables to include room
for Segment Defect Location and Defect Type fields. Also
included GFR policing. Modified PM internal RAM to 80-
bits wide to include support for I.356 measurement
requirements.
Updated VC Table and Register Addresses. Included
432SBGA package drawing. Enhanced description of OAM
processing, GFR policing, per-PHY policing, etc.
Removed “Proprietary and Confidential”. No content
change.
Aligns with Revision C
Corrected Reliability Calculations.
Corrected Block Diagram to reflect correct ingress/egress
backward cell interface block positions.
Modified RPOLL, IPOLL and TPOLL pin descriptions.
Table 37 – Added VOH specification.
Table 38 – Changed the timing specification to become
“Typical” for tSALR, tHALR, tSLR, tHLR.
Table 40 – Changed IAVALID setup and hold times (tsetup and
thold) to become “Typical”.
Table 40-45 – Changed Min CLK Frequency for RFCLK,
TFCLK, IFCLK, OFCLK, ISYSCLK, ESYSCLK.
Table 40-43 – Changed Utopia input hold times for
IWRENB[4:1], IAVALID, IADDR[4:0], IDAT[15:0], IPRTY,
ISOC, ORDENB, RPRTY, RDAT[15:0], RCA[4:1], RSOC
and TCA[4:1].
Table 40, 44, 45 – Changed prop delay times for ICA[4:1],
ISD[63:0], ISP[7:0], ESD[31:0] and ESP[3:0].
PMC-Sierra, Inc.
105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

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