UPD45128163 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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UPD45128163

128M-bit Synchronous DRAM 4-bank, LVTTL

NEC => Renesas Technology 

µPD45128441, 45128841, 45128163

8. Address Bits of Bank-Select and Precharge

Row

A0 A1 A2

A3

A4

A5 A6 A7

A8

A9

A10

A11

BA1 BA0

(A12) (A13)

(Activate command)

BA1(A12) BA0(A13) Result

0

0

Select Bank A

“Activate” command

0

1

Select Bank B

“Activate” command

1

0

Select Bank C

“Activate” command

1

1

Select Bank D

“Activate” command

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

BA1 BA0

(A12) (A13)

(Precharge command)

A10 BA1(A12) BA0(A13) Result

0

0

0 Precharge Bank A

0

0

1 Precharge Bank B

0

1

0 Precharge Bank C

0

1

1 Precharge Bank D

1

x

x Precharge All Banks

x : Don’t care

Col.

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9 A10

x

BA1 BA0

(A12) (A13)

(/CAS strobes)

0

disables Auto-Precharge

(End of Burst)

1

enables Auto-Precharge

(End of Burst)

BA1(A12) BA0(A13) Result

0

0

enables Read/Write

commands for Bank A

0

1

enables Read/Write

commands for Bank B

1

0 enables Read/Write

commands for Bank C

1

1 enables Read/Write

commands for Bank D

24

Data Sheet M12650EJBV0DS00

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