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EBS12UC6APS-7A Ver la hoja de datos (PDF) - Elpida Memory, Inc

Número de pieza
componentes Descripción
Lista de partido
EBS12UC6APS-7A
Elpida
Elpida Memory, Inc Elpida
EBS12UC6APS-7A Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
EBS12UC6APS
Serial PD Matrix
Byte No.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 to 26
27
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Number of bytes used by module
manufacturer
1
0
0
0
0
0
0
0
80H
Total SPD memory size
0 0 0 0 1 0 0 0 08H
Memory type
0 0 0 0 0 1 0 0 04H
Number of row addresses bits
0 0 0 0 1 1 0 1 0DH
Number of column addresses bits 0 0 0 0 1 0 0 1 09H
Number of banks
0 0 0 0 0 0 0 1 01H
Module data width
0 1 0 0 0 0 0 0 40H
Module data width (continued)
0 0 0 0 0 0 0 0 00H
Module interface signal levels
0 0 0 0 0 0 0 1 01H
SDRAM cycle time at CL = 3
(highest /CAS latency)
(-7A/7AL, -75/75L)
0 1 1 1 0 1 0 1 75H
(-80/80L)
1 0 0 0 0 0 0 0 80H
SDRAM access from Clock at CL = 3
(highest /CAS latency)
0 1 0 1 0 1 0 0 54H
(-7A/7AL, -75/75L)
(-80/80L)
0 1 1 0 0 0 0 0 60H
Module configuration type
0 0 0 0 0 0 0 0 00H
Refresh rate/type
1 0 0 0 0 0 1 0 82H
SDRAM width
0 0 0 1 0 0 0 0 10H
Error checking SDRAM width
0 0 0 0 0 0 0 0 00H
SDRAM device attributes:
minimum clock delay for back-to- 0 0 0 0 0 0 0 1 01H
back random column addresses
SDRAM device attributes:
Burst lengths supported
1 0 0 0 1 1 1 1 8FH
SDRAM device attributes: number of
banks on SDRAM device
0
0
0
0
0
1
0
0
04H
SDRAM device attributes:
/CAS latency
SDRAM device attributes:
/CS latency
0 0 0 0 0 1 1 0 06H
0 0 0 0 0 0 0 1 01H
SDRAM device attributes:
/WE latency
0 0 0 0 0 0 0 1 01H
SDRAM device attributes
0 0 0 0 0 0 0 0 00H
SDRAM device attributes: General 0 0 0 0 1 1 1 0 0EH
SDRAM cycle time at CL = 2
(2nd highest /CAS latency)
(-7A/7AL)
0 1 1 1 0 1 0 1 75H
(-75/75L, -80/80L)
1 0 1 0 0 0 0 0 A0H
SDRAM access from Clock at CL = 2
(2nd highest /CAS latency)
0 1 0 1 0 1 0 0 54H
(-7A/7AL)
(-75/75L, -80/80L)
0 1 1 0 0 0 0 0 60H
0 0 0 0 0 0 0 0 00H
Minimum row precharge time
(-7A/7AL)
(-75/75L, -80/80L)
0 0 0 0 1 1 1 1 0FH
0 0 0 1 0 1 0 0 14H
Comments
128 bytes
256 bytes
SDRAM
13
9
1
64 bits
0
LVTTL
7.5ns
8ns
5.4ns
6ns
None.
7.8µs
× 16
None.
1 CLK
1,2,4,8,F
4
2,3
0
0
7.5ns
10ns
5.4ns
6ns
15ns
20ns
Data Sheet E0224E20 (Ver. 2.0)
4

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