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GS74108AGX

512K x 8 4Mb Asynchronous SRAM

Giga Semiconductor 

GS74108ATP/J/X

Write Cycle

Parameter

Write cycle time

Address valid to end of write

Chip enable to end of write

Data set up time

Data hold time

Write pulse width

Address set up time

Write recovery time (WE)

Write recovery time (CE)

Output Low Z from end of write

Write to output in High Z

-8

-10

-12

Symbol

Unit

Min Max Min Max Min Max

tWC

8

—

10

—

12

—

ns

tAW

5.5

—

7

—

8

—

ns

tCW

5.5

—

7

—

8

—

ns

tDW

4

—

5

—

6

—

ns

tDH

0

—

0

—

0

—

ns

tWP

5.5

—

7

—

8

—

ns

tAS

0

—

0

—

0

—

ns

tWR

0

—

0

—

0

—

ns

tWR1

0

—

0

—

0

—

ns

tWLZ*

3

—

3

—

3

—

ns

tWHZ*

—

3.5

—

4

—

5

ns

* These parameters are sampled and are not 100% tested.

Address

OE

CE

WE

Data In

Data Out

Write Cycle 1: WE control

tWC

tAW

tWR

tCW

tAS

tWP

tWHZ

tDW

tDH

DATA VALID

tWLZ

HIGH IMPEDANCE

Rev: 1.07 1/2006

7/13

© 2001, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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