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GS71116J

64K x 16 1Mb Asynchronous SRAM

Giga Semiconductor 

AC Test Conditions

Parameter

Conditions

Input high level

Input low level

Input rise time

Input fall time

Input reference level

Output reference level

Output load

VIH=2.4V

VIL=0.4V

tr=1V/ns

tf=1V/ns

1.4V

1.4V

Fig. 1& 2

Note:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1

unless otherwise noted

3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.

GS71116TP/J/U

Output Load 1

DQ

50Ω 30pF1

VT=1.4V

Output Load 2

3.3V

DQ

589Ω

5pF1 434Ω

Rev: 1.06 6/2000

6/15

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 1999, Giga Semiconductor, Inc.

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