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BT848A

Single-Chip Video Capture for PCI

Conexant Systems 

FUNCTIONAL DESCRIPTION

Functional Overview

Bt848/848A/849A

Single-Chip Video Capture for PCI

Table 1. PCI Video Decoder Product Family

Composite, S-Video multi-standard Video

Decoder and PCI bus master

Peaking, single crystal operation, digital camera

support

WST (Teletext) decoding support

Bt848

X

Bt848A Bt849A

X

X

X

X

X

Bt848A Analog Video and

Digital Camera Capture

Over the PCI Bus

The Bt848A provides support for digital cameras. The Bt848A includes a digital

camera port providing the ability to perform digital capture when a Bt848A is used

in the development of a video board product. The Bt848A is fully compatible with

the Bt848. The datasheet defines the registers and functionality required for imple-

menting analog video capture support. In order to implement digital video inter-

face, refer to the Digital Video section of the datasheet. Note the majority of the

register settings are identical for both analog and digital video support. The Digital

Video section identifies all changes, additional registers, all changes to the analog

register setting that are required in order to support digital video.

The Bt848A can accept digital video from a multitude of sources including the

Silicon Vision and Logitech video cameras. The digital stream is routed to the high

quality down scaler and color adjustment processing. It is then bus mastered into

system memory or displayed via the graphics frame buffer.

DMA Channels

Bt848/848A/849A provides two DMA channels for the odd and even fields, each

controlled by a pixel instruction list. This instruction list is created by the Bt848

device driver and placed in the host memory. The instructions control the transfer

of pixels to target memory locations on a byte resolution basis. Complex clipping

can be accomplished by the instruction list, blocking the generation of PCI bus cy-

cles for pixels that are not to be seen on the display.

The DMA channels can be programmed on a field basis to deliver the video data

in packed or planar format. In packed mode, YCrCb data is stored in a single con-

tinuous block of memory. In planar mode, the YCrCb data is separated into three

streams which are burst to different target memory blocks. Having the video data

in planar format is useful for applications where the data compression is accom-

plished via software and the CPU.

2

L848A_A

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