datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

PI6C673FA Ver la hoja de datos (PDF) - Pericom Semiconductor

Número de pieza
componentes Descripción
Lista de partido
PI6C673FA Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
PI6C673F 133 MHz Single Chip Mobile Clock
Supports 440BX™/ VIA Promedia™ Chipset
11223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011w2233i44t55h6677P8899e0011n22t11i22u3344m556677I88I99™001122/33P44e5566n77t88i99u0011m223344I55I66I7788™9900/11C2211e22l33e4455r66o77n8899™001122
Maximum Ratings
Description
Input Voltage
Storage temperature
Min.
Vss - 0.5V
–65ºC
Max.
Vdd + 0.5V
150ºC
Recommended Operating Conditions
Parameter
Operating Conditions
Vddq_3
3.3V ±5%
Vddq_2
2.5V ±5%
Ambient temperature
0ºC to +85ºC
DC Characteristics at Recommended Operating Conditions(2)
Parameter
Min. Typ. Max. Units
Input Low voltage for S[0:1], CPU_STP#, PCI_STP#, PWR_DWN#
Input High voltage for S[0:1], CPU_STP#, PCI_STP#, PWR_DWN# 2.0
0.8
V
Tri-State leakage currrent
10 µA
Dynamic supply current, Idd, at CPUCLK = 100 MHz
150 mA
Static supply current (PWR_DWN# = 0)
200 µA
AC Characteristics at Recommended Operating Conditions(1, 2)
Parameter
CPUCLK leading PCICLK offset
Clock output duty cycle
Skews: (CPUCLK-CPUCLK), (PCICLK-PICCLK), (SDRAM-SDRAM)
Period Jitter, adjacent cycles (CPUCLK, SDRAM)
Period Jitter, adjacent cycles (PCICLK,48/24 MHz)
Min.
1
45
Typ. Max. Units
4 ns
50 55 %
175
250 ps
500
Notes:
1. CPUCLKs are measured at 1.25V, other clock outputs are measured at 1.5V.
2: Loads: CPUCLKs, 48/24 MHz, and REF clocks: 20pF max., SDRAMs, PCICLKs: 30pF max.
7
PS8400B
05/01/00

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]