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MM1099BD

System Reset (Built-in Watch Dog Timer)

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MITSUMI

System Reset (Built-in Watch Dog Timer) MM1099

Description of Operation

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1. The RESET will become "Low" if VCC rises to about 0.8V.

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Approximately 1µA (Vcc=0.8V) of pull up current is output from RESET

2. Charging starts at the capacitor CT when VCC riset to VSH (MM1099A .=. 3.25V, MM1099B .=. 4.3V), when the

output has been reset.

3. The output reset is released after a given interval TPR from when the CT Starts charging and to when it

discharges (that is, the time from when CT voltage takes a given value 1 (.=. 1.4V) up until decreases to a

given

value

2

(.=.

0.2V).

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(RESET

will

become

"High").

The

RESET

will

output

a

pull

up

current,

about

1µA

(VCC=0.8V). The reset hold time TPR is expressed by the following formula:

TPR (ms) .=. 5000 CT (µF)

After the reset release CT restarts charging and the watch dog timer begins operating.

Note that input of clock while POWER ON RESET time TPR will cause an erroneous operation.

4. If clock is input into CK terminal while CT is charging (negative edge trigger), CT changes from charging

over to discharging.

5. When the CT voltage decreases to a given threshold (.=. 0.2V), then discharging changes over to charging.

Steps 4 and 5 will be repeated while normal clock is input from the logic system.

6. When the clock ceases and CT voltage reaches the RESET ON threshold (.=. 1.4V), the output enters into

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reset state (RESET becoming "Low").

The CT charging time TWD up until the reset is output (watch dog monitoring time) is expressed by the

following formula:

TWD (ms) .=. 5000 CT (µF)

7. The reset time at the time of watch dog time TWR is the discharging time while the CT voltage lowers down

to the reset off threshold (.=. 0.2V). The calculation formula:

TWR (ms) .=. 100 CT (µF)

After the reset off threshold is reached, the output reset is released and CT commences to charge. If

thenceforth the clock is input normally, steps 4 and 5 will be repeated, and setps 6 and 7 repeated if the

clock ceases.

8. When VCC lowers down to VSL (MM1099A .=. 3.2V, MM1099B .=. 4.2V), the reset is output. At the same time

CT charged.

9. CT discharging starts when VCC rises up to VSH.

If VCC lower instantaneously, charging starts after load discharging of CT if the time interval from when VCC

comes lower than VSL up until when it rises to VSH or higher is equal or superior to the reference value of

VCC input pulse width TPI.

10.The output reset is released TPR after VCC becomes VSH or higher, and the watch dog time will start. Then if

VCC becomes VSL or lower, steps 8 to 10 will be repeated.

11.If power Off occurs, reset is output if VCC becomes VSL or lower.

12.When VCC comes down to 0V, the reset output will hold up until VCC becomes 0.8V.

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