MC10EL15DR2 Ver la hoja de datos (PDF) - ON Semiconductor
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MC10EL15DR2 Datasheet PDF : 8 Pages
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MC10EL15, MC100EL15
VCC EN SCLK CLK CLK VBB SEL VEE
16 15 14 13 12 11 10 9
10
D
Q
12345678
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
Figure 1. Logic Diagram and Pinout Assignment
Table 1. PIN DESCRIPTION
PIN
CLK, CLK
SCLK
EN
SEL
Q0−3, Q0−3
VBB
VCC
VEE
FUNCTION
ECL Diff Clock Inputs
ECL Scan Clock Input
ECL Sync Enable
ECL Clock Select Input
ECL Diff Clock Outputs
Reference Voltage Output
Positive Supply
Negative Supply
Table 2. FUNCTION TABLE
CLK* SCLK* SEL* EN*
Q
L
X
L
L
L
H
X
L
L
H
X
L
H
L
L
X
H
H
L
H
X
X
X
H
L(1)
*Pins will default low when left open.
1. On next negative transition of CLK or SCLK
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 2)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
2. For additional information, see Application Note AND8003/D.
Value
75 KW
N/A
> 1 kV
> 100 V
2 kV
Level 1
UL 94 V−0 @ 0.125 in
103
http://onsemi.com
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