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TDA9103-USER
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TDA9103-USER Datasheet PDF : 10 Pages
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TDA9103
USER’S MANUAL
DEMONSTRATION BOARD
I - INTRODUCTION
This demonstationboard has beenrealized in order
to provide the user with a complete and simple
evaluation tool of the deflection processor for mul-
tisync monitor TDA9103 (and possibly of the verti-
cal booster TDA8172).
This demoboard is in fact the core of a monitor
chassis. To have a complete monitor, we have only
to add a command board (microprocessor + key-
board), a line power board (EHT, S-correction, de-
flection transistor), a SMPS board and a video
board.
Besides the TDA9103 described in a separate data
sheet, we will find on this board the following func-
tions :
- A vertical deflection circuit based on the TDA8172
- A class A power amplifier for the EW correction
- A line transistor driver stage
- A DC/DC converter for the scanning supply (so
called B+)
- A separable analog command board with poten-
tiometers for the generation (from an external 5V
power supply) of the 11 control voltages required
by the TDA9103 and with a simulator of horizontal
flyback
In this way, the user will be able in a first step to
evaluate the performances of the IC under clean
conditions. In a second step, after having broken
the printed board, he will be able to connect the
demoboard to a monitor and to use the commands
of an existing monitor and thus use his own soft-
ware to drive the TDA9103.
II - TECHNICAL INFORMATIONS
II.1 - Board Description
II.1.1 - Main Board
II.1.1.1 - Core
The board is built around the IC TDA9103 and very
few external components :
- C2-R32
Line oscillator.
- C3-C7-R31 Filter of the line PLL.
- C4
Vertical oscillator.
- C5
Memory capacitor for the
vertical AGC.
- C26-R68-R67 Gain of the error amplifier
of DC/DC converter.
- D4-R80-C48
Circuit for improvement
behaviour with Composite Sync
(See Section II.1.1.8. These
components may be omitted
if such standards are not used).
II.1.1.2 - 0/5V to 2/6V Interface
The IC TDA9103 uses two 8V internal voltage
references VREF (for the vertical part) and HREF (for
the horizontal one). So, the analog voltage range is
2 to 6V.
As a microprocessor usually delivers a voltage in
the range 0-5V, we must implement an interface
with 3 resistors for each of the 10 adjustments
required by the TDA9103 (R1 to R30).
The four circuits for horizontal (resp vertical) adjust-
ments are connected to HREF (resp VREF).
II.1.1.3 - EW Amplifier
The parabola generated by the TDA9103 for the
EW correction must be amplified in order to drive
the diode modulator.
This function is performed by the class A amplifier
Q3-Q4-Q9. A DC voltage is added to the parabola
to achieve the horizontal size adjustments.
For a proper working, this amplifier must be loaded
(100connected to Vp = 24V).
II.1.1.4 - Horizontal Line Driver Stage
The HOUT pulse delivered by the TDA9103 is used
to turn on a MOS transistor via a push pull stage.
The pulse is transmitted to the line transistor by a
driver transformer. When Q2 is ON (HOUT at high
level), the line transistor is off.
You will find in annexe the specification of the
transformer used on this board. Two key points of
the spec must be highlighted :
- Leakage inductor 2µH (this data set the turnoff
time of the power transistor).
- Parasitic capacitor < 50pf (a too high value leads
to a transmission of a commutation spike to the
secondary side and the chassisground and could
make some trouble in the working of the chassis).
April 1995
1/10

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