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LT1683

Slew Rate Controlled Ultralow Noise Push-Pull DC/DC Controller

Linear Technology 

LT1683

APPLICATIONS INFORMATION

current controls the fundamental component. ESR should

also be low to reduce capacitor dissipation.

The capacitance value can be computed by consideration

of desired load ripple, duty cycle and ESR.

COUT

=

1

∆ VOUT

∆ IL(MAX )

− ESR

• DCMIN

f

MOSFET Selection

There is a wide variety of MOSFETs to choose from for

this part. The part will work with either normal threshold

(3V to 4V) or logic-level threshold devices (1V to 2V).

Select a voltage rating to ensure under worst-case condi-

tions that the MOSFET will not break down. Next choose

an RON sufficiently low to meet both the power dissipation

capabilities of the MOSFET package as well as overall ef-

ficiency needs of the converter.

The LT1683 can handle a large range of gate charges.

However at very large charge stability may be affected.

The power dissipation in the MOSFET depends on several

factors. The primary element is I2R heating when the device

is on. In addition, power is dissipated when the device is

slewing. An estimate for power dissipation is:

P=

⎧

⎪

⎨⎪VIN

⎪

I2

•

+ ΔI2

4

ISR

+

⎡

⎢ VIN2

⎣⎢

−

RON2

•

⎛

⎝⎜

I2

VSR

+

3 • ΔI2

4

⎞

⎠⎟

⎤

⎥

⎦⎥

⎫

⎪

•I⎬⎪

⎪

⎪

⎪

⎩

⎭

• f +I2 •RON •DC

where I is the average current, ∆I is the ripple current in

the switch, ISR is the current slew rate, VSR is the voltage

slew rate, f is the oscillator frequency, DC is the duty cycle

and RON is the MOSFET on-resistance.

Setting GCL Voltage

Setting the voltage on the GCL pin depends on what type

of MOSFET is used and the desired gate drive undervoltage

lockout voltage.

First determine the maximum gate drive that you require.

Typically you will want it to be at least 2V greater than the

maximum threshold. Higher voltages will lower the on

resistance and increase efficiency. Be certain to check the

maximum allowed gate voltage. Often this is 20V but for

some logic threshold MOSFETs it is only 8V to 10V.

VGCL needs to be set approximately 0.2V above the desired

max gate threshold. In addition VIN needs to be at least

1.6V above the gate voltage.

The GCL pin can be tied to VIN which will result in a maxi-

mum gate voltage of VIN – 1.6V.

This pin also controls undervoltage lockout of the gate

drives. The undervoltage lockout will prevent the MOSFETs

from switching until there is sufficient drive present.

If GCL is tied to a voltage source or Zener less than 6.8V,

the gate drivers will not turn on until VIN exceeds the GCL

voltage by 0.8V. For VGCL above 6.5V, the gate drives are

ensured to be off for VIN < 7.3V and they will be turned

on by VGCL + 0.8V.

If GCL is tied to VIN, the gate drivers are always on

(undervoltage lockout is disabled).

Approximately 50µA of current can be sourced from this pin

if VIN > VGCL + 0.8V. This could be used to bias a Zener.

The GCL pin has an internal 19V Zener to ground that will

provide a failsafe for maximum gate voltage.

As an example say we are using a Siliconix Si4480DY

which has RDS(ON) rated at 6V. To get 6V, VGCL needs to

be set to 6.2V and VIN needs to be at least 7.6V.

1683fd

21

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