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UDA1331H

Universal Serial Bus (USB) Audio Playback Peripheral (APP)

Philips Electronics 

Philips Semiconductors

Universal Serial Bus (USB) Audio

Playback Peripheral (APP)

Preliminary specification

UDA1331H

FUNCTIONAL DESCRIPTION

All bold-faced parameters given in this data sheet

such as ‘bAlternateSetting’ are part of the USB

specification as described in “USB Device Class

Definition for Audio Devices”.

The Universal Serial Bus (USB)

Data and power are transferred via the USB by a 4-wire

cable. The signalling occurs via two wires and

point-to-point segments. The signals on each segment are

differentially driven into a cable of 90 Ω intrinsic

impedance. The differential receiver features input

sensitivity of at least 200 mV and sufficient common mode

rejection.

The analog front-end

The analog front-end is an on-chip generic USB

transceiver. It is designed to allow voltage levels up to VDD

from standard or programmable logic to interface with the

physical layer of the USB. It is capable of receiving and

transmitting serial data at full speed (12 Mbits/s).

The USB processor

The USB processor forms the interface between the

analog front-end, the ADAC and the microcontroller.

The USB processor consists of:

• The Philips Serial Interface Engine (PSIE)

• The Memory Management Unit (MMU)

• The Audio Sample Redistribution (ASR) module.

THE PHILIPS SERIAL INTERFACE ENGINE AND MEMORY

MANAGEMENT UNIT (PSIE AND MMU)

The PSIE and MMU translate the electrical USB signals

into bytes and signals. Depending upon the USB device

address and the USB endpoint address, the USB data is

directed to the correct endpoint buffer on the PSIE and

MMU interface. The data transfer could be of the bulk,

isochronous, control or interrupt type. The USB device

address is configured during the enumeration process.

The UDA1331H has three endpoints. These are:

• Control endpoint 0

• Status interrupt endpoint

• Isochronous data sink endpoint.

The amount of bytes per packet on the control endpoint is

limited by the PSIE and MMU hardware to 8 bytes per

packet.

The PSIE is the digital front-end of the USB processor.

This module recovers the 12 MHz USB clock, detects the

USB sync word and handles all low-level USB protocols

and error checking.

The MMU is the digital back-end of the USB processor.

It handles the temporary data storage of all USB packets

that are received or sent over the bus. Three types of

packets are defined on the USB. These are:

• Token packets

• Data packets

• Handshake packets.

The token packet contains information about the

destination of the data packet. The audio data is

transferred via an isochronous data sink endpoint and

consequently no handshaking mechanism is used.

The MMU also generates a 1 kHz clock that is locked to

the USB Start-Of-Frame (SOF) token.

THE AUDIO SAMPLE REDISTRIBUTION (ASR) MODULE

The ASR module reads the audio samples from the MMU

and distributes these samples equidistant over a 1 ms

frame period. The distributed audio samples are translated

by the digital I/O module to standard I2S-bus format or

Japanese digital I/O format. The ASR module generates

the bit clock and the word select signal of the digital I/O.

The digital I/O formats the received audio samples to one

of the four specified serial digital audio formats

(standard I2S-bus, 16, 18 or 20 bits LSB-justified).

The microcontroller

The microcontroller receives the control information

selected from the USB by the USB processor. It handles

the high-level USB protocols and the user interfaces.

The major task of the software process, that is mapped

upon the microcontroller, is to control the different modules

of the UDA1331H in such a way that it behaves as a USB

device. Therefore the microcontroller:

• Interprets the USB requests and maps them upon the

UDA1331H application

• Controls the internal operation of the UDA1331H and

the digital I/O pins

• Communicates with the external world (EEPROM) using

the I2C-bus facility and the general purpose I/O pins.

The firmware must be located in an external (E)PROM.

The UDA1331H will be delivered with standard USB

compliant firmware.

1998 Oct 06

8

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