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CS5508-SD Ver la hoja de datos (PDF) - Cirrus Logic

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CS5508-SD Datasheet PDF : 40 Pages
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CS5505/6/7/8
5V DIGITAL CHARACTERISTICS (TA = TMIN to TMAX; VA+VD+ = 5V ± 10%; VA-= -5V ± 10%;
DGND = 0.) All measurements below are performed under static conditions. (Note 2)
Parameter
Symbol Min
Typ
Max Units
High-Level Input Voltage:
XIN VIH
3.5
-
M/SLP VIH 0.9VD+
-
All Pins Except XIN and M/SLP VIH
2.0
-
-
V
-
V
-
V
Low-Level Input Voltage:
XIN VIL
-
M/SLP VIL
-
All Pins Except XIN and M/SLP VIL
-
-
1.5
V
-
0.1VD+ V
-
0.8
V
M/SLP SLEEP Active Threshold
(Note 8) VSLP 0.45VD+ 0.5VD+ 0.55VD+ V
High-Level Output Voltage
(Note 9) VOH (VD+)-1.0
-
-
V
Low Level Output Voltage
Input Leakage Current
Iout = 1.6 mA
VOL
-
Iin
-
-
0.4
V
1
10
µA
3-State Leakage Current
IOZ
-
-
±10
µA
Digital Output Pin Capacitance
Cout
-
9
-
pF
Notes:
8. Under normal operation this pin should be tied to VD+ or DGND. Anytime the voltage on the M/SLP
pin enters the SLEEP active threshold range the device will enter the power down condition. Returning
to the active state requires elapse of the power-on reset period, the oscillator to start-up, and elapse
of the wake-up period.
9. Iout = -100 µA. This guarantees the ability to drive one TTL load. (VOH = 2.4V @ Iout = -40 µA).
3.3V DIGITAL CHARACTERISTICS (TA = TMIN to TMAX; VA+ = 5V ± 10%; VD+ = 3.3V ± 5%;
VA-= -5V ± 10%; DGND = 0.) All measurements below are performed under static conditions. (Note 2)
Parameter
Symbol Min
Typ
Max Units
High-Level Input Voltage:
XIN VIH 0.7VD+
-
M/SLP VIH 0.9VD+
-
All Pins Except XIN and M/SLP VIH 0.6VD+
-
-
V
-
V
-
V
Low-Level Input Voltage:
XIN VIL
-
M/SLP VIL
-
All Pins Except XIN and M/SLP VIL
-
-
0.3VD+ V
-
0.1VD+ V
-
0.16VD+ V
M/SLP SLEEP Active Threshold
(Note 8) VSLP 0.43VD+ 0.45VD+ 0.47VD+ V
High-Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Iout = -400 µA
Iout = 400 µA
VOH (VD+)-0.3
-
VOL
-
-
Iin
-
1
-
V
0.3
V
10
µA
3-State Leakage Current
IOZ
-
-
±10
µA
Digital Output Pin Capacitance
Cout
-
9
-
pF
DS59F4
5

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