CIRCC Ver la hoja de datos (PDF) - SMSC -> Microchip

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CIRCC

Consumer Infrared Communications Controller

SMSC -> Microchip 

REGISTERS

The CIrCC is partially enabled through binary

controls found in two 8-byte register banks. The

banks, the ACE550 UART Controls and the SCE

Controls, are selected with the nACE and nSCE

register-bank selector inputs found in the

Interface Description.

If nACE is zero, the three least significant bits of

the Host Address Bus decode the 16C550A

UART control registers. If nSCE is zero, the

SCE control bank is addressed. All of the CIrCC

registers are 8 bits wide.

ACE UART CONTROLS

The table below (Table 12) lists the ACE UART

Control Registers. See the current SMSC

16C550A implementation for a complete

description.

Table 12 - 16C550A UART Addressing

DLAB A2 A1 A0 DIRECTION

REGISTER NAME

0

000

Read

Receive Buffer

0

000

Write

Transmit Buffer

0

0 0 1 Read/Write

Interrupt Enable

X

010

Read

Interrupt Identification

X

010

Write

FIFO Control

X

0 1 1 Read/Write

Line Control

X

1 0 0 Read/Write

Modem Control

X

1 0 1 Read/Write

Line Status

X

1 1 0 Read/Write

Modem Status

X

1 1 1 Read/Write

Scratchpad

1

0 0 0 Read/Write

Divisor (LSB)

1

0 0 1 Read/Write

Divisor (MSB)

22

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