CIRCC Ver la hoja de datos (PDF) - SMSC -> Microchip

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CIRCC

Consumer Infrared Communications Controller

SMSC -> Microchip 

Table 30 - Register Summary For An Individual UART Channel (continued)

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

Data Bit 2

Data Bit 3

Data Bit 4

Data Bit 5

Data Bit 6

Data Bit 7

Data Bit 2

Data Bit 3

Data Bit 4

Data Bit 5

Data Bit 6

Data Bit 7

Enable

Enable

0

0

0

0

Receiver Line MODEM

Status

Status

Interrupt

Interrupt

(ELSI)

(EMSI)

Interrupt ID Bit Interrupt ID Bit 0

0

FIFOs

FIFOs

(Note 5)

Enabled (Note Enabled (Note

5)

5)

XMIT FIFO

Reset

DMA Mode

Select (Note

6)

Reserved

Reserved

RCVR Trigger RCVR Trigger

LSB

MSB

Number of

Stop Bits

(STB)

Parity Enable Even Parity Stick Parity

(PEN)

Select (EPS)

Set Break

Divisor Latch

Access Bit

(DLAB)

OUT1

OUT2

Loop

0

0

0

(Note 3)

(Note 3)

Parity Error

(PE)

Framing Error Break

(FE)

Interrupt (BI)

Transmitter

Holding

Register

(THRE)

Transmitter Error in RCVR

Empty (TEMT) FIFO (Note 5)

(Note 2)

Trailing Edge Delta Data

Clear to Send Data Set

Ring Indicator Data Carrier

Ring Indicator Carrier Detect (CTS)

Ready (DSR) (RI)

Detect (DCD)

(TERI)

(DDCD)

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

Bit 10

Bit 11

Bit 12

Bit 13

Bit 14

Bit 15

Note 3: This bit no longer has a pin associated with it.

Note 4: When operating in the XT mode, this register is not available.

Note 5: These bits are always zero in the non-FIFO mode.

Note 6: Writing a one to this bit has no effect. DMA modes are not supported in this chip.

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