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MT6225ACS

GSM/GPRS Baseband Processor

Unspecified 

MT6225 GSM/GPRS Baseband Processor Data Sheet Revision 1.00

Preface

Acronym for Register Type

R/W

RO

RC

WO

W1S

W1C

Capable of both read and write access

Read only

Read only. After reading the register bank, each bit which is HIGH(1) will be cleared to LOW(0 )

automatically.

Write only

Write only. When writing data bits to register bank, each bit which is HIGH(1) will cause the

corresponding bit to be set to 1. Data bits which are LOW(0) has no effect on the corresponding bit.

Write only. When writing data bits to register bank, each bit which is HIGH(1) will cause the

corresponding bit to be cleared to 0. Data bits which are LOW(0) has no effect on the corresponding bit.

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