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OZ9910

Dual Forward PWM Controller

O2Micro International 

FUNCTIONAL INFORMATION

1. Steady-State Operation

Referring to the schematics shown in Figures 2

and 3 on pages 10 and 11 the OZ9910 drives a

zero-voltage switching (ZVS), dual forward power

stage where the transformer couples the energy

from the power source to the secondary load. In

both applications, the voltage and the current can

be used as the feedback control signals to

regulate the outputs. In CCFL applications, Figure

2, page 10 the current flowing through the CCFL is

sensed and regulated, through sense resistor R8,

then compared with a reference voltage via a

current amplifier, resulting in PWM drive outputs to

the dual forward converter switches. Switches M1,

M2, M3, M4 are configured such that the switch in

each pair, M1/M4 and M2/M3, are turned-on

complementarily. The amount of time where

switches M1/M2 and M3/M4 conduct, determine

the amount of energy delivered to the load. A

voltage loop is established to monitor the output

voltage such that a required turn-on voltage is

achieved. A soft-start circuit ensures a gradual

increase in the output power to minimize stress to

the other components. The capacitor at

CMP_SST (pin 10), determines the rate of rise of

the voltage on CMP_SST pin, where the voltage

at this pin determines the on-time duration of

switches M1/M2 and M3/M4.

Circuit operation is initiated by applying the bias

voltage to VIN (pin13) and subsequently providing

the enable signal to ENA (pin 8) of the IC. The

output drives, include NDRV4, NDRV2, PDRV3

and PDRV1 (pins 1,3,15,16 respectively) output

square pulses. The frequency is determined by

resistor R4 and capacitor C2 connected to CT (pin

5). Initially, the energy converted from the power

source to the load is low due to the soft-start

function. The energy increases as the soft-start

capacitor voltage increases linearly with time. The

voltage at the secondary side of the transformer

T1 increases correspondingly. This process

continues until the load current is detected and

reaches a regulated value. The output of the error

amplifier, CMP_SST (pin 10), compared with CT

signal at pin 5, whose valley and peak voltages

are 0.1V and 2.0V respectively, commands proper

switching among the four output drives to maintain

current regulation. The operations of the four

switches are implemented with zero-voltage

switching to provide a high-efficiency power

conversion.

In the TWT application, Figure 3, page 11 either

the current or the voltage can be used as a

feedback control

OZ9910

parameter. The operation theory is similar to the

above discussion.

Referring to Figure 2, page 10 in the case of an

open-lamp condition emulating an aged lamp, the

OZ9910 provides an optional, user-defined,

turn-on frequency. The turn-on frequency is

implemented through capacitor C2 connected to

CT pin. The striking (turn-on) time is determined

by capacitor C9 connected to LCT (pin 6). The

ignition voltage (open-lamp voltage) is regulated

through the voltage feedback loop. This highly

integrated circuit (IC) provides a cost effective yet

high-degree of design flexibility.

An open-load protection feature is provided for

safe operation when removing a lamp during

normal operation under either one of the two

following conditions. For condition one, when the

IC senses the missing current signal through ISEN

(pin 11) and the voltage at CMP_SST (pin 10)

reaches an ~2.5V threshold, the output drives are

shut off. Under condition two, when the voltage

at VSEN (pin 9) reaches an ~ 3.0V threshold, the

output drives are shut off. The output drives will

remain in the latched mode. Toggling ENA (pin 8)

is necessary to resume normal operation.

Dimming control of OZ9910 is implemented by

combining LPWM and analog-adjust for regulating

the current in the CCFL. This provides a very wide

range of dimming control to a CCFL. When ADJ

(pin 7) input voltage is less than 1.5V, the LPWM

control is activated while the amplitude of the lamp

current is maintained. This mode provides a wide

dimming control while maintaining the operational

life-time of a CCFL. The LPWM frequency is

determined by capacitor C9 and resistor R1

connected to LCT (pin 6). When ADJ (pin 7)

input voltage is greater than 1.5V, the CCFL

current amplitude will be increased.

OZ9910 operates in a constant frequency mode.

This eliminates any undesired interference

between inverter and LCD panels where

interference is usually associated with

variable-frequency designs.

2. Enable

OZ9910 is enabled when the voltage on ENA (pin

8) is greater than 2V. A voltage of less than 1V

disables the IC. When the IC is disabled, it draws

approximately 80uA. An under-voltage lockout

protection feature is provided that will disable the

IC if VIN voltage drops below a threshold of

approximately 5.6V. The IC will resume normal

operation once VIN reaches a threshold voltage of

greater than approximately 5.8V.

CONFIDENTIAL

OZ9910-DS-1.0

Page 7

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