DM8108 Ver la hoja de datos (PDF) - Davicom Semiconductor, Inc.
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DM8108 Datasheet PDF : 35 Pages
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DM8108
8 port 10/100M Fast Ethernet Switching Controller
Pin Description (continued)
Please refer to the “Strap pin default value after reset section” for the detail description of the
Strap pins.
DRAM Interface
Pin No.
139 – 146,
148 – 155,
157 – 164,
166 – 173
183 – 184,
186 – 189,
191 – 195
177
178
180
182
179
Pin Name
MD(31:0)
MA(10:0)
SRAS*
SDCAS*
SDWE*
SDQM
SDCS*
I/O
Description
I/O DRAM data lines 31 – 0
I/O DRAM address lines 10-0; strap pins during reset
MA9: 0= enable limit4, 1=disbale limit 4
MA8: DRAM size selection; 0= 1M, 1=2M
MA7-0: Auto-negotiation enable for port 7-0; 0= enabled
O Row address strobe for SDRAM
O Column address strobe for SDRAM
O Write cycle indication, internally pulled up
O Data Mask for SDRAM
O Chip select for SDRAM
Expansion Bus
Pin No.
204
208 – 205
197
202 – 199
Pin Name
RXDVCLK
RXD8[3:0]
TXENCLK
TXD8[3:0]
I/O
Description
I/O Expansion port’s receiving data valid
I/O Expansion port’s receive data input
I/O Expansion port’s transmit enable output
I/O Expansion port’s transmit data output
Strap pins during reset:
TXD8[2:0] = device # setting
TXD8[3] = dram timing
LED Interface
Pin No.
2
4
3
Pin Name
LEDCLK
LEDD
LDSTB
I/O
Description
O LED data clock
O LED data: active low. Data stream that contains LED indicators per
port. The data is shifted out and should be qualified by LDSTB* to
clock into external registers to drive LEDs.
Strap pin during reset:
0: expansion port with fast speed
1: expansion port with lower apees
I/O LED data strobe: active high. Used to strobe the LD into an external
register
Strap pin during reset:
0: force link
1: link detection through serial MII
Preliminary
7
Version: DM8108-DS-P02
November 25, 1999
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