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FDC37C669

PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support

SMSC -> Microchip 

QFP/

TQFP

PIN NO.

NAME

94 Drive 2

DESCRIPTION OF PIN FUNCTIONS

SYMBOL

DRV2

BUFFER

TYPE

DESCRIPTION

I

In PS/2 mode, this input indicates whether a

second drive is connected; DRV2 should be

low if a second drive is connected. This status

is reflected in a read of Status Register A.

Address X

nADRX

Interrupt Request IRQ_B

B

23

IRQIN

58

PWRGD

OD24

024

Active low address decode out: used to

decode a 1, 8, or 16 byte address block. (An

external pull-up is required). Refer to

Configuration registers CR03, CR08 and

CR09 for more information. This pin has a

30ua internal pull-up. The interrupt request

from a logical device or IRQIN may be output

on IRQ_B. Refer to the configuration registers

for more information.

(OD24)

I

I

(If EPP or ECP Mode is enabled, this output is

pulsed low, then released to allow sharing of

interrupts.)

This pin is used to steer an interrupt signal

from an external device onto one of eight IRQ

outputs IRQA-H.

This active high input indicates that the power

(VCC) is valid. For device operation, PWRGD

must be active. When PWRGD is inactive, all

inputs to Mercury are disconnected and put

into a low power mode; all outputs are put into

high impedance. The contents of all registers

are preserved as long as VCC has a valid

value. The driver current drain in this mode

drops to ISTBY - standby current. This input

has an internal 30ua pull-up.

98 I/O Power

15,72 Power

nGAMECS

NC

VCC

This is the Game Port Chip Select output -

O4 active low. It will go active when the I/O

address, qualified by AEN, matches that

selected in Configuration register CR1E.

No Connect

Positive Supply Voltage.

14

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