FDC37N958FR Ver la hoja de datos (PDF) - SMSC -> Microchip

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FDC37N958FR

Notebook I/O Controller with Enhanced Keyboard and System Control

SMSC -> Microchip 

PinPin

PIN #

105

106

197

110

198

111

148

149

150

151

152

153

154

155

184

185

186

187

NAME

DESCRIPTION OF PIN FUNCTIONS

SUPPLY

DESCRIPTION

VOLTAGE

TYPE

VCC1_PWGD

nRESET_OUT

nBAT_LED

nPWR_LED

nFDD_LED

PWRGD

WK_EE4/IN0

WK_EE2/IN1

WK_EE3/IN2

nGPWKUP/

IN3

WK_HL1/IN4

WK_HL2/IN5

WK_HL6/IN6

WK_EE1/IN7

WK_HL3/

GPIO0

WK_HL4/

GPIO1

WK_HL5/

GPIO2

TRIGGER/

GPIO3

VCC1 Power Good Input pin. The

trailing edge of VCC1 POR is

released 20ms from the assertion of

this pin. If this pin is pulled low

while VCC1 is valid, then VCC1

POR will be asserted and held until

20ms from re-assertion of this pin.

This pin has an internal weak

(90"A) pull-up to VCC1.

System reset (active low)

Battery LED (0=on)

Power LED (0=on)

Floppy LED. This pin is asserted

whenever either DRVSEL1 or

DRVSEL0 is asserted or controlled

by the 8051. (0 = on)

Powergood

Wakeup event/Generic Input 0

Wakeup event/Generic Input 1

Wakeup event/Generic Input 2

Wakeup event/Generic Input 3

VCC1

VCC2

VCC1

VCC1

VCC1

VCC2

VCC1

VCC1

VCC1

VCC1

Wakeup event/Generic Input 4

Wakeup event/Generic Input 5

Wakeup event/Generic Input 6

Wakeup event/Generic Input 7

Wakeup event/

GP I/O 0

Wakeup event/

GP I/O 1

Wakeup event/

GP I/O 2

Interrupt 1 event/

GP I/O 3

VCC1

VCC1

VCC1

VCC1

VCC1

VCC1

VCC1

VCC1

I

O8

OD24

OD24

OD24

I

I

I

I

I

I

I

I

I

I/

I/O8

I/

I/O8

I/

I/O8

I/

I/O8

SMSC DS – FDC37N958FR

Page 8

Rev. 09/01/99

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