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FDC37N958FR Ver la hoja de datos (PDF) - SMSC -> Microchip

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FDC37N958FR Datasheet PDF : 316 Pages
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UART Power Management
Direct power management is controlled by CR22.
Refer to CR22 in the Configuration Section for
more information.
Auto power management is enabled by CR23 bit
4 and bit 5. When set, these bits allow the
following auto power management operations:
1. The transmitter enters auto powerdown when
the transmit buffer and shift register are
empty.
2. The receiver enters powerdown when the
following conditions are all met:
A. Receive FIFO is empty
B. The receiver is waiting for a start bit.
Note: While in powerdown the Ring Indicator
interrupt is still valid.
Exit Auto Powerdown
The transmitter exits powerdown on a write to the
transmit buffer. The receiver exits auto
powerdown when RXD changes state.
Parallel Port Power Management
Direct power management is controlled by CR22.
Refer to CR22 in the Configuration Section for
more information.
Auto power management is enabled by CR23 bit
3. When set, this bit allows the ECP or EPP
logical parallel port blocks to be placed into
powerdown when not being used.
The EPP logic is in powerdown under any of the
following conditions:
1. EPP is not enabled in the configuration
registers.
2. EPP is not selected through ecr while in ECP
mode.
The ECP logic is in powerdown under any of the
following conditions:
1. ECP is not enabled in the configuration
registers.
2 SPP, PS/2 Parallel port or EPP mode is
selected through ecr while in ECP mode.
Exit Auto Powerdown
The parallel port logic can change powerdown
modes when the ECP mode is changed through
the ecr register or when the parallel port mode is
changed through the configuration registers.
SMSC DS – FDC37N958FR
Page 22
Rev. 09/01/99

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