COM20022 Ver la hoja de datos (PDF) - SMSC -> Microchip

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COM20022

10Mbps ARCNET controller with 2Kx8 on-board RAM

SMSC -> Microchip 

CABLE TYPE

RG-62 Belden #86262

RG-59/U Belden #89108

RG-11/U Belden #89108

IBM Type 1* Belden #89688

IBM Type 3* Telephone Twisted

Pair Belden #1155A

COMCODE 26 AWG Twisted

Pair Part #105-064-703

Table 1 - Typical Media

NOMINAL

ATTENUATION PER 1000 FT.

IMPEDANCE

AT 5 MHz

93$

5.5dB

75$

7.0dB

75$

5.5dB

150$

7.0dB

100$

17.9dB

105$

16.0dB

*Non-plenum-rated cables of this type are also available.

FUNCTIONAL DESCRIPTION

MICROSEQUENCER

is stored in the ROM and the instructions are

The COM20022 contains an internal fetched and then placed into the instruction

microsequencer which performs all of the control registers. One register holds the opcode, while

operations necessary to carry out the ARCNET the other holds the immediate data. Once the

protocol. It consists of a clock generator, a 544 x instruction is fetched, it is decoded by the internal

8 ROM, a program counter, two instruction instruction decoder, at which point the COM20022

registers, an instruction decoder, a no-op proceeds to execute the instruction. When a no-

generator, jump logic, and reconfiguration logic.

op instruction is encountered, the microsequencer

enters a timed loop and the program counter is

The COM20022 derives a 20 MHz and a 10 MHz temporarily stopped until the loop is complete.

clock from the output clock of the Clock Multiplier. When a jump instruction is encountered, the

These clocks provide the rate at which the program counter is loaded with the jump address

instructions are executed within the COM20022. from the ROM. The COM20022 contains an

The 20 MHz clock is the rate at which the program internal reconfiguration timer which interrupts the

counter operates, while the 10 MHz clock is the microsequencer if it has timed out. At this point

rate at which the instructions are executed. The the program counter is cleared and the

microprogram

MYRECON bit of the Diagnostic Status Register is

set.

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