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COM20022V-HT

10Mbps ARCNET controller with 2Kx8 on-board RAM

SMSC -> Microchip 

TABLE OF CONTENTS

FEATURES............................................................................................................................................ 1

GENERAL DESCRIPTION .................................................................................................................... 2

PIN CONFIGURATION .......................................................................................................................... 5

DESCRIPTION OF PIN FUNCTIONS .................................................................................................... 6

PROTOCOL DESCRIPTION ................................................................................................................. 9

NETWORK PROTOCOL ................................................................................................................... 9

DATA RATES .................................................................................................................................... 9

NETWORK RECONFIGURATION .................................................................................................. 10

BROADCAST MESSAGES ............................................................................................................. 11

EXTENDED TIMEOUT FUNCTION................................................................................................. 11

LINE PROTOCOL ........................................................................................................................... 11

SYSTEM DESCRIPTION ..................................................................................................................... 14

MICROCONTROLLER INTERFACE ............................................................................................... 14

TRANSMISSION MEDIA INTERFACE............................................................................................ 23

FUNCTIONAL DESCRIPTION............................................................................................................. 28

MICROSEQUENCER ...................................................................................................................... 28

INTERNAL REGISTERS ................................................................................................................. 31

INTERNAL RAM.............................................................................................................................. 49

COMMAND CHAINING ................................................................................................................... 54

INITIALIZATION SEQUENCE ......................................................................................................... 56

IMPROVED DIAGNOSTICS............................................................................................................ 57

OPERATIONAL DESCRIPTION.......................................................................................................... 59

MAXIMUM GUARANTEED RATINGS* ........................................................................................... 59

DC ELECTRICAL CHARACTERISTICS.......................................................................................... 59

TIMING DIAGRAMS ............................................................................................................................ 62

APPENDIX A ....................................................................................................................................... 82

APPENDIX B: EXAMPLE OF INTERFACE CIRCUIT DIAGRAM TO ISA BUS................................. 86

COM20022, FUNCTIONAL REV. B ANOMALY.................................................................................. 87

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